TT#23584 Use $(MAKE) instead of make to honor parallel builds

We need to use the MAKE variable in Makefiles to be able to honor
parallel builds.

While this is of no much consequence here as the kernel module is
composed of a single file, the kbuild system might still be able
to perform other actions in parallel, it still is good form and
makes this future-proof, and copy&paste resistant.

Change-Id: I43b95e59d99eb223b45007d20e18f33761cebca6

kernel-module/Makefile

@@ -31,10 +31,10 @@ obj-m        += xt_RTPENGINE.o
 .PHONY:		modules clean patch install
 
 modules:
-		make -C $(KBUILD) M=$(PWD) O=$(KBUILD) modules
+		$(MAKE) -C $(KBUILD) M=$(PWD) O=$(KBUILD) modules
 
 clean:
-		make -C $(KBUILD) M=$(PWD) clean || true
+		$(MAKE) -C $(KBUILD) M=$(PWD) clean || true
 
 patch:
 		../utils/patch-kernel magic "$(PWD)" "$(KERNEL)" "$(RTPENGINE_VERSION)"