diff --git a/.cproject b/.cproject index 6d3ce3d..275c100 100644 --- a/.cproject +++ b/.cproject @@ -1,266 +1,266 @@ - + - + - - - - - - + + + + + + - - - - - - - + + + + + - + - + - - - - - - + + + + + + - - - - - - - + + + + + - + - + - + - + - + - + - + - + - + - + - + - + diff --git a/.mxproject b/.mxproject index 5041c83..123ae57 100644 --- a/.mxproject +++ b/.mxproject @@ -1,14 +1,14 @@ -[PreviousGenFiles] -HeaderPath=C:/sw4stm32-projekty/vp-digi/Inc -HeaderFiles=usb_device.h;usbd_conf.h;usbd_desc.h;usbd_cdc_if.h;stm32f1xx_it.h;stm32f1xx_hal_conf.h;main.h; -SourcePath=C:/sw4stm32-projekty/vp-digi/Src -SourceFiles=usb_device.c;usbd_conf.c;usbd_desc.c;usbd_cdc_if.c;stm32f1xx_it.c;stm32f1xx_hal_msp.c;main.c; - [PreviousLibFiles] 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[PreviousUsedSW4STM32Files] -SourceFiles=..\Src\main.c;..\Src\usb_device.c;..\Src\usbd_conf.c;..\Src\usbd_desc.c;..\Src\usbd_cdc_if.c;..\Src\stm32f1xx_it.c;..\Src\stm32f1xx_hal_msp.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd_ex.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usb.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;..\Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c;..\Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c;..\Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c;..\Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c;..\\Src/system_stm32f1xx.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio_ex.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pcd_ex.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usb.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c;..\Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c;..\Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c;..\Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c;..\Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c;..\Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c;..\\Src/system_stm32f1xx.c;..\Drivers/CMSIS/Device/ST/STM32F1xx/Source/Templates/system_stm32f1xx.c;;..\Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_core.c;..\Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ctlreq.c;..\Middlewares/ST/STM32_USB_Device_Library/Core/Src/usbd_ioreq.c;..\Middlewares/ST/STM32_USB_Device_Library/Class/CDC/Src/usbd_cdc.c; +SourceFiles=..\Src\main.c;..\Src\usb_device.c;..\Src\usbd_conf.c;..\Src\usbd_desc.c;..\Src\usbd_cdc_if.c;..\Src\stm32f1xx_it.c;..\Src\stm32f1xx_hal_msp.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pcd.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pcd_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_usb.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.c;..\Middlewares\ST\STM32_USB_Device_Library\Core\Src\usbd_core.c;..\Middlewares\ST\STM32_USB_Device_Library\Core\Src\usbd_ctlreq.c;..\Middlewares\ST\STM32_USB_Device_Library\Core\Src\usbd_ioreq.c;..\Middlewares\ST\STM32_USB_Device_Library\Class\CDC\Src\usbd_cdc.c;..\Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;..\\Src\system_stm32f1xx.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pcd.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pcd_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_ll_usb.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_rcc_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_gpio.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_dma.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_cortex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_pwr.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_flash_ex.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_exti.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim.c;..\Drivers\STM32F1xx_HAL_Driver\Src\stm32f1xx_hal_tim_ex.c;..\Middlewares\ST\STM32_USB_Device_Library\Core\Src\usbd_core.c;..\Middlewares\ST\STM32_USB_Device_Library\Core\Src\usbd_ctlreq.c;..\Middlewares\ST\STM32_USB_Device_Library\Core\Src\usbd_ioreq.c;..\Middlewares\ST\STM32_USB_Device_Library\Class\CDC\Src\usbd_cdc.c;..\Drivers\CMSIS\Device\ST\STM32F1xx\Source\Templates\system_stm32f1xx.c;..\\Src\system_stm32f1xx.c;;;..\Middlewares\ST\STM32_USB_Device_Library\Core\Src\usbd_core.c;..\Middlewares\ST\STM32_USB_Device_Library\Core\Src\usbd_ctlreq.c;..\Middlewares\ST\STM32_USB_Device_Library\Core\Src\usbd_ioreq.c;..\Middlewares\ST\STM32_USB_Device_Library\Class\CDC\Src\usbd_cdc.c; HeaderPath=..\Drivers\STM32F1xx_HAL_Driver\Inc;..\Drivers\STM32F1xx_HAL_Driver\Inc\Legacy;..\Middlewares\ST\STM32_USB_Device_Library\Core\Inc;..\Middlewares\ST\STM32_USB_Device_Library\Class\CDC\Inc;..\Drivers\CMSIS\Device\ST\STM32F1xx\Include;..\Drivers\CMSIS\Include;..\Inc; CDefines=USE_HAL_DRIVER;STM32F103xB;USE_HAL_DRIVER;USE_HAL_DRIVER; +[PreviousGenFiles] +HeaderPath=..\Inc +HeaderFiles=usb_device.h;usbd_conf.h;usbd_desc.h;usbd_cdc_if.h;stm32f1xx_it.h;stm32f1xx_hal_conf.h;main.h; +SourcePath=..\Src +SourceFiles=usb_device.c;usbd_conf.c;usbd_desc.c;usbd_cdc_if.c;stm32f1xx_it.c;stm32f1xx_hal_msp.c;main.c; + diff --git a/.project b/.project index f8ad00b..950078d 100644 --- a/.project +++ b/.project @@ -1,7 +1,7 @@ F103C8T6_DIGI_USB - + diff --git a/Drivers/CMSIS/LICENSE.txt b/Drivers/CMSIS/LICENSE.txt new file mode 100644 index 0000000..8dada3e --- /dev/null +++ b/Drivers/CMSIS/LICENSE.txt @@ -0,0 +1,201 @@ + Apache License + Version 2.0, January 2004 + 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In no event and under no legal theory, + whether in tort (including negligence), contract, or otherwise, + unless required by applicable law (such as deliberate and grossly + negligent acts) or agreed to in writing, shall any Contributor be + liable to You for damages, including any direct, indirect, special, + incidental, or consequential damages of any character arising as a + result of this License or out of the use or inability to use the + Work (including but not limited to damages for loss of goodwill, + work stoppage, computer failure or malfunction, or any and all + other commercial damages or losses), even if such Contributor + has been advised of the possibility of such damages. + + 9. Accepting Warranty or Additional Liability. While redistributing + the Work or Derivative Works thereof, You may choose to offer, + and charge a fee for, acceptance of support, warranty, indemnity, + or other liability obligations and/or rights consistent with this + License. However, in accepting such obligations, You may act only + on Your own behalf and on Your sole responsibility, not on behalf + of any other Contributor, and only if You agree to indemnify, + defend, and hold each Contributor harmless for any liability + incurred by, or claims asserted against, such Contributor by reason + of your accepting any such warranty or additional liability. + + END OF TERMS AND CONDITIONS + + APPENDIX: How to apply the Apache License to your work. + + To apply the Apache License to your work, attach the following + boilerplate notice, with the fields enclosed by brackets "{}" + replaced with your own identifying information. (Don't include + the brackets!) The text should be enclosed in the appropriate + comment syntax for the file format. We also recommend that a + file or class name and description of purpose be included on the + same "printed page" as the copyright notice for easier + identification within third-party archives. + + Copyright {yyyy} {name of copyright owner} + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. diff --git a/F103C8T6_DIGI_USB.ioc b/F103C8T6_DIGI_USB.ioc index 136ce5f..ebc76ed 100644 --- a/F103C8T6_DIGI_USB.ioc +++ b/F103C8T6_DIGI_USB.ioc @@ -2,6 +2,7 @@ File.Version=6 GPIO.groupedBy=Group By Peripherals KeepUserPlacement=false +Mcu.CPN=STM32F103C8T6 Mcu.Family=STM32F1 Mcu.IP0=NVIC Mcu.IP1=RCC @@ -27,18 +28,18 @@ Mcu.UserConstants= Mcu.UserName=STM32F103C8Tx MxCube.Version=5.6.1 MxDb.Version=DB.5.0.60 -NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false -NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true +NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true NVIC.ForceEnableDMAVector=true -NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false -NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false -NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false -NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true +NVIC.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true +NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true +NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true NVIC.PriorityGroup=NVIC_PRIORITYGROUP_4 -NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false -NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true -NVIC.USB_LP_CAN1_RX0_IRQn=true\:0\:0\:false\:false\:true\:false\:true -NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false +NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true +NVIC.SysTick_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true +NVIC.USB_LP_CAN1_RX0_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:true +NVIC.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:true PA11.Mode=Device PA11.Signal=USB_DM PA12.Locked=true @@ -69,7 +70,7 @@ ProjectManager.DeviceId=STM32F103C8Tx ProjectManager.FirmwarePackage=STM32Cube FW_F1 V1.8.0 ProjectManager.FreePins=false ProjectManager.HalAssertFull=false -ProjectManager.HeapSize=0x200 +ProjectManager.HeapSize=0x80 ProjectManager.KeepUserCode=true ProjectManager.LastFirmware=true ProjectManager.LibraryCopy=1 @@ -80,7 +81,7 @@ ProjectManager.ProjectBuild=false ProjectManager.ProjectFileName=F103C8T6_DIGI_USB.ioc ProjectManager.ProjectName=F103C8T6_DIGI_USB ProjectManager.RegisterCallBack= -ProjectManager.StackSize=0x400 +ProjectManager.StackSize=0x200 ProjectManager.TargetToolchain=SW4STM32 ProjectManager.ToolChainLocation= ProjectManager.UnderRoot=true diff --git a/F103C8T6_DIGI_USB.xml b/F103C8T6_DIGI_USB.xml index a09e329..6d2f1d4 100644 --- a/F103C8T6_DIGI_USB.xml +++ b/F103C8T6_DIGI_USB.xml @@ -1,18 +1,17 @@ - - - - - - - + + + + + + + ]> - - + F103C8T6_DIGI_USB - SWD + JTAG ST-Link stm32f103c8tx diff --git a/Inc/common.h b/Inc/common.h index a3aa5d2..d56f9d8 100644 --- a/Inc/common.h +++ b/Inc/common.h @@ -19,7 +19,7 @@ along with VP-Digi. If not, see . #define COMMON_H_ #include -#include "drivers/uart.h" +#include "uart.h" #define IS_UPPERCASE_ALPHANUMERIC(x) ((((x) >= '0') && ((x) <= '9')) || (((x) >= 'A') && ((x) <= 'Z'))) #define IS_NUMBER(x) (((x) >= '0') && ((x) <= '9')) diff --git a/Inc/drivers/modem_ll.h b/Inc/drivers/modem_ll.h new file mode 100644 index 0000000..90a3c82 --- /dev/null +++ b/Inc/drivers/modem_ll.h @@ -0,0 +1,196 @@ +/* +Copyright 2020-2023 Piotr Wilkon +This file is part of VP-Digi. + +VP-Digi is free software: you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3 of the License, or +(at your option) any later version. + +VP-Digi is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with VP-Digi. If not, see . +*/ + +/* + * This file is kind of HAL for modem + */ + +#ifndef DRIVERS_MODEM_LL_H_ +#define DRIVERS_MODEM_LL_H_ + +#include + +//Oversampling factor +//This is a helper value, not a setting that can be changed without further code modification! +#define MODEM_LL_OVERSAMPLING_FACTOR 4 + +#if defined(STM32F103xB) || defined(STM32F103x8) + +#include "stm32f1xx.h" + +/** + * TIM1 is used for pushing samples to DAC (R2R or PWM) (clocked at 18 MHz) + * TIM3 is the baudrate generator for TX (clocked at 18 MHz) + * TIM4 is the PWM generator with no software interrupt + * TIM2 is the RX sampling timer with no software interrupt, but it directly calls DMA + */ + +#define MODEM_LL_DMA_INTERRUPT_HANDLER DMA1_Channel2_IRQHandler +#define MODEM_LL_DAC_INTERRUPT_HANDLER TIM1_UP_IRQHandler +#define MODEM_LL_BAUDRATE_TIMER_INTERRUPT_HANDLER TIM3_IRQHandler + +#define MODEM_LL_DMA_IRQ DMA1_Channel2_IRQn +#define MODEM_LL_DAC_IRQ TIM1_UP_IRQn +#define MODEM_LL_BAUDRATE_TIMER_IRQ TIM3_IRQn + +#define MODEM_LL_DMA_TRANSFER_COMPLETE_FLAG (DMA1->ISR & DMA_ISR_TCIF2) +#define MODEM_LL_DMA_CLEAR_TRANSFER_COMPLETE_FLAG() {DMA1->IFCR |= DMA_IFCR_CTCIF2;} + +#define MODEM_LL_BAUDRATE_TIMER_CLEAR_INTERRUPT_FLAG() {TIM3->SR &= ~TIM_SR_UIF;} +#define MODEM_LL_BAUDRATE_TIMER_ENABLE() {TIM3->CR1 = TIM_CR1_CEN;} +#define MODEM_LL_BAUDRATE_TIMER_DISABLE() {TIM3->CR1 &= ~TIM_CR1_CEN;} +#define MODEM_LL_BAUDRATE_TIMER_SET_RELOAD_VALUE(val) {TIM3->ARR = (val);} + +#define MODEM_LL_DAC_TIMER_CLEAR_INTERRUPT_FLAG {TIM1->SR &= ~TIM_SR_UIF;} +#define MODEM_LL_DAC_TIMER_SET_RELOAD_VALUE(val) {TIM1->ARR = (val);} +#define MODEM_LL_DAC_TIMER_SET_CURRENT_VALUE(val) {TIM1->CNT = (val);} +#define MODEM_LL_DAC_TIMER_ENABLE() {TIM1->CR1 |= TIM_CR1_CEN;} +#define MODEM_LL_DAC_TIMER_DISABLE() {TIM1->CR1 &= ~TIM_CR1_CEN;} + +#define MODEM_LL_ADC_TIMER_ENABLE() {TIM2->CR1 |= TIM_CR1_CEN;} +#define MODEM_LL_ADC_TIMER_DISABLE() {TIM2->CR1 &= ~TIM_CR1_CEN;} + +#define MODEM_LL_PWM_PUT_VALUE(value) {TIM4->CCR1 = (value);} + +#define MODEM_LL_R2R_PUT_VALUE(value) {GPIOB->ODR &= ~0xF000; \ + GPIOB->ODR |= ((uint32_t)(value) << 12); }\ + + +#define MODEM_LL_DCD_LED_ON() { \ + GPIOC->BSRR = GPIO_BSRR_BR13; \ + GPIOB->BSRR = GPIO_BSRR_BS5; \ +} \ + +#define MODEM_LL_DCD_LED_OFF() { \ + GPIOC->BSRR = GPIO_BSRR_BS13; \ + GPIOB->BSRR = GPIO_BSRR_BR5; \ +} \ + +#define MODEM_LL_PTT_ON() {GPIOB->BSRR = GPIO_BSRR_BS7;} +#define MODEM_LL_PTT_OFF() {GPIOB->BSRR = GPIO_BSRR_BR7;} + +#define MODEM_LL_INITIALIZE_RCC() { \ + RCC->APB2ENR |= RCC_APB2ENR_IOPBEN; \ + RCC->APB2ENR |= RCC_APB2ENR_IOPCEN; \ + RCC->APB2ENR |= RCC_APB2ENR_IOPAEN; \ + RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; \ + RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; \ + RCC->APB2ENR |= RCC_APB2ENR_TIM1EN; \ + RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; \ + RCC->AHBENR |= RCC_AHBENR_DMA1EN; \ + RCC->APB1ENR |= RCC_APB1ENR_TIM4EN; \ +} \ + +#define MODEM_LL_INITIALIZE_OUTPUTS() { \ + /* DCD LEDs: PC13 (cathode driven - built-in LED on Blue Pill) and PB5 (anode driven) */ \ + GPIOC->CRH |= GPIO_CRH_MODE13_1; \ + GPIOC->CRH &= ~GPIO_CRH_MODE13_0; \ + GPIOC->CRH &= ~GPIO_CRH_CNF13; \ + GPIOB->CRL |= GPIO_CRL_MODE5_1; \ + GPIOB->CRL &= ~GPIO_CRL_MODE5_0; \ + GPIOB->CRL &= ~GPIO_CRL_CNF5; \ + /* PTT: PB7 */ \ + GPIOB->CRL |= GPIO_CRL_MODE7_1; \ + GPIOB->CRL &= ~GPIO_CRL_MODE7_0; \ + GPIOB->CRL &= ~GPIO_CRL_CNF7; \ + /* R2R: 4 bits, PB12-PB15 */ \ + GPIOB->CRH &= ~0xFFFF0000; \ + GPIOB->CRH |= 0x22220000; \ + /* PWM output: PB6 */ \ + GPIOB->CRL |= GPIO_CRL_CNF6_1; \ + GPIOB->CRL |= GPIO_CRL_MODE6; \ + GPIOB->CRL &= ~GPIO_CRL_CNF6_0; \ +} \ + +#define MODEM_LL_INITIALIZE_ADC() { \ + /* ADC input: PA0 */ \ + GPIOA->CRL &= ~GPIO_CRL_CNF0; \ + GPIOA->CRL &= ~GPIO_CRL_MODE0; \ + /*/6 prescaler */ \ + RCC->CFGR |= RCC_CFGR_ADCPRE_1; \ + RCC->CFGR &= ~RCC_CFGR_ADCPRE_0; \ + ADC1->CR2 |= ADC_CR2_CONT; \ + ADC1->CR2 |= ADC_CR2_EXTSEL; \ + ADC1->SQR1 &= ~ADC_SQR1_L; \ + /* 41.5 cycle sampling */ \ + ADC1->SMPR2 |= ADC_SMPR2_SMP0_2; \ + ADC1->SQR3 &= ~ADC_SQR3_SQ1; \ + ADC1->CR2 |= ADC_CR2_ADON; \ + /* calibrate */ \ + ADC1->CR2 |= ADC_CR2_RSTCAL; \ + while(ADC1->CR2 & ADC_CR2_RSTCAL) \ + ; \ + ADC1->CR2 |= ADC_CR2_CAL; \ + while(ADC1->CR2 & ADC_CR2_CAL) \ + ; \ + ADC1->CR2 |= ADC_CR2_EXTTRIG; \ + ADC1->CR2 |= ADC_CR2_SWSTART; \ +} \ + +#define MODEM_LL_INITIALIZE_DMA(buffer) { \ + /* 16 bit memory region */ \ + DMA1_Channel2->CCR |= DMA_CCR_MSIZE_0; \ + DMA1_Channel2->CCR &= ~DMA_CCR_MSIZE_1; \ + DMA1_Channel2->CCR |= DMA_CCR_PSIZE_0; \ + DMA1_Channel2->CCR &= ~DMA_CCR_PSIZE_1; \ + /* enable memory pointer increment, circular mode and interrupt generation */ \ + DMA1_Channel2->CCR |= DMA_CCR_MINC | DMA_CCR_CIRC| DMA_CCR_TCIE; \ + DMA1_Channel2->CNDTR = MODEM_LL_OVERSAMPLING_FACTOR; \ + DMA1_Channel2->CPAR = (uintptr_t)&(ADC1->DR); \ + DMA1_Channel2->CMAR = (uintptr_t)buffer; \ + DMA1_Channel2->CCR |= DMA_CCR_EN; \ +} \ + +#define MODEM_LL_ADC_TIMER_INITIALIZE() { \ + /* 72 / 9 = 8 MHz */ \ + TIM2->PSC = 8; \ + /* enable DMA call instead of standard interrupt */ \ + TIM2->DIER |= TIM_DIER_UDE; \ +} \ + +#define MODEM_LL_DAC_TIMER_INITIALIZE() { \ + /* 72 / 4 = 18 MHz */ \ + TIM1->PSC = 3; \ + TIM1->DIER |= TIM_DIER_UIE; \ +} \ + +#define MODEM_LL_BAUDRATE_TIMER_INITIALIZE() { \ + /* 72 / 4 = 18 MHz */ \ + TIM3->PSC = 3; \ + TIM3->DIER |= TIM_DIER_UIE; \ +} \ + +#define MODEM_LL_PWM_INITIALIZE() { \ + /* 72 / 3 = 24 MHz to provide 8 bit resolution at around 100 kHz */ \ + TIM4->PSC = 2; \ + /* 24 MHz / 258 = 93 kHz */ \ + TIM4->ARR = 257; \ + TIM4->CCMR1 |= TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2; \ + TIM4->CCER |= TIM_CCER_CC1E; \ + TIM4->CR1 |= TIM_CR1_CEN; \ +} \ + +#define MODEM_LL_ADC_SET_SAMPLE_RATE(rate) {TIM2->ARR = (8000000 / (rate)) - 1;} + +#define MODEM_LL_DAC_TIMER_CALCULATE_STEP(frequency) ((18000000 / (frequency)) - 1) + +#define MODEM_LL_BAUDRATE_TIMER_CALCULATE_STEP(frequency) ((18000000 / (frequency)) - 1) + +#endif + +#endif /* DRIVERS_MODEM_LL_H_ */ diff --git a/Inc/drivers/uart_ll.h b/Inc/drivers/uart_ll.h new file mode 100644 index 0000000..be7e033 --- /dev/null +++ b/Inc/drivers/uart_ll.h @@ -0,0 +1,81 @@ +/* +Copyright 2020-2023 Piotr Wilkon +This file is part of VP-Digi. + +VP-Digi is free software: you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 3 of the License, or +(at your option) any later version. + +VP-Digi is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with VP-Digi. If not, see . +*/ + +/* + * This file is kind of HAL for UART + */ + +#ifndef DRIVERS_UART_LL_H_ +#define DRIVERS_UART_LL_H_ + +#if defined(STM32F103xB) || defined(STM32F103x8) + +#include "stm32f1xx.h" + +#define UART_LL_ENABLE(port) {port->CR1 |= USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE | USART_CR1_UE | USART_CR1_IDLEIE;} +#define UART_LL_DISABLE(port) {port->CR1 &= (~USART_CR1_RXNEIE) & (~USART_CR1_TE) & (~USART_CR1_RE) & (~USART_CR1_UE) & (~USART_CR1_IDLEIE);} + +#define UART_LL_CHECK_RX_NOT_EMPTY(port) (port->SR & USART_SR_RXNE) +#define UART_LL_CLEAR_RX_NOT_EMPTY(port) {port->SR &= ~USART_SR_RXNE;} + +#define UART_LL_CHECK_TX_EMPTY(port) (port->SR & USART_SR_TXE) +#define UART_LL_ENABLE_TX_EMPTY_INTERRUPT(port) {port->CR1 |= USART_CR1_TXEIE;} +#define UART_LL_DISABLE_TX_EMPTY_INTERRUPT(port) {port->CR1 &= ~USART_CR1_TXEIE;} +#define UART_LL_CHECK_ENABLED_TX_EMPTY_INTERRUPT(port) (port->CR1 & USART_CR1_TXEIE) + + +#define UART_LL_CHECK_RX_IDLE(port) (port->SR & USART_SR_IDLE) + +#define UART_LL_GET_DATA(port) (port->DR) +#define UART_LL_PUT_DATA(port, data) {port->DR = (data);} + + +#define UART_LL_UART1_INTERUPT_HANDLER USART1_IRQHandler +#define UART_LL_UART2_INTERUPT_HANDLER USART2_IRQHandler + +#define UART_LL_UART1_STRUCTURE USART1 +#define UART_LL_UART2_STRUCTURE USART2 + +#define UART_LL_UART1_IRQ USART1_IRQn +#define UART_LL_UART2_IRQ USART2_IRQn + +#define UART_LL_UART1_INITIALIZE_PERIPHERAL(baudrate) { \ + RCC->APB2ENR |= RCC_APB2ENR_IOPAEN; \ + RCC->APB2ENR |= RCC_APB2ENR_USART1EN; \ + GPIOA->CRH |= GPIO_CRH_MODE9_1; \ + GPIOA->CRH &= ~GPIO_CRH_CNF9_0; \ + GPIOA->CRH |= GPIO_CRH_CNF9_1; \ + GPIOA->CRH |= GPIO_CRH_CNF10_0; \ + GPIOA->CRH &= ~GPIO_CRH_CNF10_1; \ + UART_LL_UART1_STRUCTURE->BRR = (SystemCoreClock / baudrate); \ +} \ + +#define UART_LL_UART2_INITIALIZE_PERIPHERAL(baudrate) { \ + RCC->APB2ENR |= RCC_APB2ENR_IOPAEN; \ + RCC->APB1ENR |= RCC_APB1ENR_USART2EN; \ + GPIOA->CRL |= GPIO_CRL_MODE2_1; \ + GPIOA->CRL &= ~GPIO_CRL_CNF2_0; \ + GPIOA->CRL |= GPIO_CRL_CNF2_1; \ + GPIOA->CRL |= GPIO_CRL_CNF3_0; \ + GPIOA->CRL &= ~GPIO_CRL_CNF3_1; \ + UART_LL_UART2_STRUCTURE->BRR = (SystemCoreClock / (baudrate * 2)); \ +} \ + +#endif + +#endif /* INC_DRIVERS_UART_LL_H_ */ diff --git a/Src/drivers/watchdog.c b/Inc/drivers/usb.h similarity index 58% rename from Src/drivers/watchdog.c rename to Inc/drivers/usb.h index 7c1b125..f769d93 100644 --- a/Src/drivers/watchdog.c +++ b/Inc/drivers/usb.h @@ -16,19 +16,27 @@ You should have received a copy of the GNU General Public License along with VP-Digi. If not, see . */ -#include "drivers/watchdog.h" + +#ifndef DRIVERS_USB_H_ +#define DRIVERS_USB_H_ + +#include "systick.h" + +#if defined(STM32F103xB) || defined(STM32F103x8) + #include "stm32f1xx.h" -void WdogInit(void) -{ - IWDG->KR = 0x5555; //configuration mode - IWDG->PR = 0b101; //prescaler - IWDG->RLR = 0xFFF; //timeout register - IWDG->KR = 0xCCCC; //start -} +#define USB_FORCE_REENUMERATION() { \ + /* Pull D+ to ground for a moment to force reenumeration */ \ + RCC->APB2ENR |= RCC_APB2ENR_IOPAEN; \ + GPIOA->CRH |= GPIO_CRH_MODE12_1; \ + GPIOA->CRH &= ~GPIO_CRH_CNF12; \ + GPIOA->BSRR = GPIO_BSRR_BR12; \ + Delay(100); \ + GPIOA->CRH &= ~GPIO_CRH_MODE12; \ + GPIOA->CRH |= GPIO_CRH_CNF12_0; \ +} \ +#endif -void WdogReset(void) -{ - IWDG->KR = 0xAAAA; //reset -} +#endif /* DRIVERS_USB_H_ */ diff --git a/Inc/drivers/watchdog.h b/Inc/drivers/watchdog.h index ac02141..cf41d4f 100644 --- a/Inc/drivers/watchdog.h +++ b/Inc/drivers/watchdog.h @@ -19,17 +19,28 @@ along with VP-Digi. If not, see . #ifndef DRIVERS_WATCHDOG_H_ #define DRIVERS_WATCHDOG_H_ - +#if defined(STM32F103xB) || defined(STM32F103x8) /** * @brief Initialize watchdog */ -void WdogInit(void); +void WdogInit(void) +{ + IWDG->KR = 0x5555; //configuration mode + IWDG->PR = 0b101; //prescaler + IWDG->RLR = 0xFFF; //timeout register + IWDG->KR = 0xCCCC; //start +} /** * @brief Restart watchdog * @attention Must be called continuously in main loop */ -void WdogReset(void); +void WdogReset(void) +{ + IWDG->KR = 0xAAAA; //reset +} + +#endif #endif /* DRIVERS_WATCHDOG_H_ */ diff --git a/Inc/kiss.h b/Inc/kiss.h index bcf48bf..5ca424f 100644 --- a/Inc/kiss.h +++ b/Inc/kiss.h @@ -21,7 +21,7 @@ along with VP-Digi. If not, see . #define KISS_H_ #include -#include "drivers/uart.h" +#include "uart.h" /** * @brief Convert AX.25 frame to KISS and send diff --git a/Inc/drivers/modem.h b/Inc/modem.h similarity index 100% rename from Inc/drivers/modem.h rename to Inc/modem.h diff --git a/Inc/drivers/systick.h b/Inc/systick.h similarity index 82% rename from Inc/drivers/systick.h rename to Inc/systick.h index 60c71b7..787a972 100644 --- a/Inc/drivers/systick.h +++ b/Inc/systick.h @@ -21,16 +21,24 @@ along with VP-Digi. If not, see . #include - #define SYSTICK_FREQUENCY 100 //systick frequency in Hz #define SYSTICK_INTERVAL (1000 / SYSTICK_FREQUENCY) //systick interval in milliseconds -extern volatile uint32_t ticks; - +/** + * @brief Initialize SysTick + */ void SysTickInit(void); +/** + * @brief Get current SysTick counter value + * @return Current SysTick counter value + */ uint32_t SysTickGet(void); +/** + * @brief Execute a blocking delay + * @param ms Time in milliseconds + */ void Delay(uint32_t ms); #endif /* SYSTICK_H_ */ diff --git a/Inc/terminal.h b/Inc/terminal.h index bbddc6b..7a504cc 100644 --- a/Inc/terminal.h +++ b/Inc/terminal.h @@ -19,7 +19,7 @@ along with VP-Digi. If not, see . #ifndef TERMINAL_H_ #define TERMINAL_H_ -#include "drivers/uart.h" +#include "uart.h" #include /** diff --git a/Inc/drivers/uart.h b/Inc/uart.h similarity index 98% rename from Inc/drivers/uart.h rename to Inc/uart.h index 23cba43..96804ef 100644 --- a/Inc/drivers/uart.h +++ b/Inc/uart.h @@ -19,10 +19,10 @@ along with VP-Digi. If not, see . #ifndef UART_H_ #define UART_H_ -#include "stm32f1xx.h" #include #include "usbd_cdc_if.h" #include "ax25.h" +#include "drivers/uart_ll.h" #define UART_BUFFER_SIZE 130 diff --git a/Inc/usbd_cdc_if.h b/Inc/usbd_cdc_if.h index 9792e9a..663e67d 100644 --- a/Inc/usbd_cdc_if.h +++ b/Inc/usbd_cdc_if.h @@ -31,7 +31,7 @@ #include "usbd_cdc.h" /* USER CODE BEGIN INCLUDE */ -#include "drivers/uart.h" +#include "uart.h" /* USER CODE END INCLUDE */ /** @addtogroup STM32_USB_OTG_DEVICE_LIBRARY diff --git a/Src/ax25.c b/Src/ax25.c index e18173e..8d7f812 100644 --- a/Src/ax25.c +++ b/Src/ax25.c @@ -18,13 +18,13 @@ along with VP-Digi. If not, see . */ +#include "modem.h" #include "ax25.h" #include -#include "drivers/modem.h" #include "common.h" #include #include -#include "drivers/systick.h" +#include "systick.h" #include "digipeater.h" struct Ax25ProtoConfig Ax25Config; diff --git a/Src/beacon.c b/Src/beacon.c index 8cfdb50..863f9b1 100644 --- a/Src/beacon.c +++ b/Src/beacon.c @@ -20,9 +20,9 @@ along with VP-Digi. If not, see . #include "digipeater.h" #include "common.h" #include +#include #include "ax25.h" #include "terminal.h" -#include "drivers/systick.h" struct Beacon beacon[8]; diff --git a/Src/common.c b/Src/common.c index 0f1ca0e..6d599ff 100644 --- a/Src/common.c +++ b/Src/common.c @@ -16,11 +16,10 @@ You should have received a copy of the GNU General Public License along with VP-Digi. If not, see . */ -#include "common.h" -#include "ax25.h" #include #include -#include "drivers/uart.h" +#include "common.h" +#include "ax25.h" #include "usbd_cdc_if.h" struct _GeneralConfig GeneralConfig = diff --git a/Src/config.c b/Src/config.c index a6413cb..3fc2c65 100644 --- a/Src/config.c +++ b/Src/config.c @@ -16,16 +16,15 @@ You should have received a copy of the GNU General Public License along with VP-DigiConfig. If not, see . */ +#include "modem.h" +#include "uart.h" #include "config.h" #include "common.h" -#include "drivers/uart.h" #include "usbd_cdc_if.h" #include "digipeater.h" -#include "drivers/uart.h" #include "ax25.h" #include "beacon.h" #include "stm32f1xx.h" -#include "drivers/modem.h" #define CONFIG_ADDRESS 0x800F000 #define CONFIG_PAGE_COUNT 2 diff --git a/Src/digipeater.c b/Src/digipeater.c index a36c7e8..4ef84c5 100644 --- a/Src/digipeater.c +++ b/Src/digipeater.c @@ -18,12 +18,12 @@ along with VP-Digi. If not, see . #include "digipeater.h" #include "terminal.h" -#include "drivers/modem.h" #include #include "common.h" #include "ax25.h" #include -#include "drivers/systick.h" +#include +#include struct _DigiConfig DigiConfig; diff --git a/Src/main.c b/Src/main.c index b01d029..bea05b8 100644 --- a/Src/main.c +++ b/Src/main.c @@ -41,18 +41,18 @@ along with VP-Digi. If not, see . /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ -#include "drivers/modem.h" #include +#include "systick.h" +#include "modem.h" #include "ax25.h" -#include "drivers/uart.h" -#include "drivers/systick.h" -#include "stm32f1xx.h" #include "digipeater.h" #include "common.h" #include "drivers/watchdog.h" #include "beacon.h" #include "terminal.h" #include "config.h" +#include "uart.h" +#include "drivers/usb.h" #ifdef ENABLE_FX25 #include "fx25.h" #endif @@ -196,14 +196,7 @@ int main(void) SysTickInit(); - //force usb re-enumeration after reset - RCC->APB2ENR |= RCC_APB2ENR_IOPAEN; //pull D+ to ground for a moment - GPIOA->CRH |= GPIO_CRH_MODE12_1; - GPIOA->CRH &= ~GPIO_CRH_CNF12; - GPIOA->BSRR = GPIO_BSRR_BR12; - Delay(100); - GPIOA->CRH &= ~GPIO_CRH_MODE12; - GPIOA->CRH |= GPIO_CRH_CNF12_0; + USB_FORCE_REENUMERATION(); /* USER CODE END SysInit */ @@ -224,7 +217,10 @@ int main(void) //set some initial values in case there is no configuration saved in memory Uart1.baudrate = 9600; + Uart1.defaultMode = MODE_KISS; Uart2.baudrate = 9600; + Uart2.defaultMode = MODE_KISS; + UartUsb.defaultMode = MODE_KISS; ModemConfig.usePWM = 1; //use PWM by default ModemConfig.flatAudioIn = 0; Ax25Config.quietTime = 300; @@ -241,8 +237,8 @@ int main(void) Fx25Init(); #endif - UartInit(&Uart1, USART1, Uart1.baudrate); - UartInit(&Uart2, USART2, Uart2.baudrate); + UartInit(&Uart1, UART_LL_UART1_STRUCTURE, Uart1.baudrate); + UartInit(&Uart2, UART_LL_UART2_STRUCTURE, Uart2.baudrate); UartInit(&UartUsb, NULL, 1); UartConfig(&Uart1, 1); diff --git a/Src/drivers/modem.c b/Src/modem.c similarity index 76% rename from Src/drivers/modem.c rename to Src/modem.c index cca9f41..41606fd 100644 --- a/Src/drivers/modem.c +++ b/Src/modem.c @@ -16,15 +16,15 @@ You should have received a copy of the GNU General Public License along with VP-Digi. If not, see . */ -#include "drivers/systick.h" -#include "drivers/modem.h" -#include "ax25.h" +#include #include +#include #include +#include +#include "ax25.h" #include "common.h" -#include -#include "stm32f1xx.h" - +#include "systick.h" +#include "drivers/modem_ll.h" /* * Configuration for PLL-based data carrier detection @@ -81,7 +81,7 @@ static enum ModemTxTestMode txTestState; //current TX test mode static uint8_t demodCount; //actual number of parallel demodulators static uint16_t dacSine[DAC_SINE_SIZE]; //sine samples for DAC static uint8_t dacSineIdx; //current sine sample index -static volatile uint16_t samples[4]; //very raw received samples, filled directly by DMA +static volatile uint16_t samples[MODEM_LL_OVERSAMPLING_FACTOR]; //very raw received samples, filled directly by DMA static uint8_t currentSymbol; //current symbol for NRZI encoding static uint8_t scrambledSymbol; //current symbol after scrambling static float markFreq; //mark frequency @@ -209,7 +209,7 @@ static struct DemodState demodState[MODEM_MAX_DEMODULATOR_COUNT]; static void decode(uint8_t symbol, uint8_t demod); static int32_t demodulate(int16_t sample, struct DemodState *dem); -static void setPtt(uint8_t state); +static void setPtt(bool state); static int32_t filter(struct Filter *filter, int32_t input) { @@ -263,19 +263,17 @@ enum ModemPrefilter ModemGetFilterType(uint8_t modem) /** * @brief Set DCD LED - * @param[in] state 0 - OFF, 1 - ON + * @param[in] state False - OFF, true - ON */ -static void setDcd(uint8_t state) +static void setDcd(bool state) { if(state) { - GPIOC->BSRR = GPIO_BSRR_BR13; - GPIOB->BSRR = GPIO_BSRR_BS5; + MODEM_LL_DCD_LED_ON(); } else { - GPIOC->BSRR = GPIO_BSRR_BS13; - GPIOB->BSRR = GPIO_BSRR_BR5; + MODEM_LL_DCD_LED_OFF(); } } @@ -302,12 +300,12 @@ static inline uint8_t scramble(uint8_t in) /** * @brief ISR for demodulator */ -void DMA1_Channel2_IRQHandler(void) __attribute__ ((interrupt)); -void DMA1_Channel2_IRQHandler(void) +void MODEM_LL_DMA_INTERRUPT_HANDLER(void) __attribute__ ((interrupt)); +void MODEM_LL_DMA_INTERRUPT_HANDLER(void) { - if(DMA1->ISR & DMA_ISR_TCIF2) + if(MODEM_LL_DMA_TRANSFER_COMPLETE_FLAG) { - DMA1->IFCR |= DMA_IFCR_CTCIF2; + MODEM_LL_DMA_CLEAR_TRANSFER_COMPLETE_FLAG(); //each sample is 12 bits, output sample is 13 bits int32_t sample = ((samples[0] + samples[1] + samples[2] + samples[3]) >> 1) - 4095; //calculate input sample (decimation) @@ -325,12 +323,12 @@ void DMA1_Channel2_IRQHandler(void) if(partialDcd) //DCD on any of the demodulators { dcd = 1; - setDcd(1); + setDcd(true); } else //no DCD on both demodulators { dcd = 0; - setDcd(0); + setDcd(false); } } } @@ -338,10 +336,10 @@ void DMA1_Channel2_IRQHandler(void) /** * @brief ISR for pushing DAC samples */ - void TIM1_UP_IRQHandler(void) __attribute__ ((interrupt)); - void TIM1_UP_IRQHandler(void) + void MODEM_LL_DAC_INTERRUPT_HANDLER(void) __attribute__ ((interrupt)); + void MODEM_LL_DAC_INTERRUPT_HANDLER(void) { - TIM1->SR &= ~TIM_SR_UIF; + MODEM_LL_DAC_TIMER_CLEAR_INTERRUPT_FLAG; int32_t sample = 0; @@ -363,12 +361,11 @@ void DMA1_Channel2_IRQHandler(void) if(ModemConfig.usePWM) { - TIM4->CCR1 = sample; + MODEM_LL_PWM_PUT_VALUE(sample); } else { - GPIOB->ODR &= ~0xF000; //zero 4 oldest bits - GPIOB->ODR |= ((uint32_t)sample << 12); //write sample to 4 oldest bits + MODEM_LL_R2R_PUT_VALUE(sample); } } @@ -377,10 +374,10 @@ void DMA1_Channel2_IRQHandler(void) /** * @brief ISR for baudrate generator timer. NRZI encoding is done here. */ - void TIM3_IRQHandler(void) __attribute__ ((interrupt)); - void TIM3_IRQHandler(void) + void MODEM_LL_BAUDRATE_TIMER_INTERRUPT_HANDLER(void) __attribute__ ((interrupt)); + void MODEM_LL_BAUDRATE_TIMER_INTERRUPT_HANDLER(void) { - TIM3->SR &= ~TIM_SR_UIF; + MODEM_LL_BAUDRATE_TIMER_CLEAR_INTERRUPT_FLAG(); if(txTestState == TEST_DISABLED) //transmitting normal data { @@ -406,11 +403,15 @@ void DMA1_Channel2_IRQHandler(void) } else { - TIM1->CNT = 0; - if(currentSymbol) //current symbol is space - TIM1->ARR = spaceStep; - else //mark - TIM1->ARR = markStep; + MODEM_LL_DAC_TIMER_SET_CURRENT_VALUE(0); + if(currentSymbol) + { + MODEM_LL_DAC_TIMER_SET_RELOAD_VALUE(spaceStep); + } + else + { + MODEM_LL_DAC_TIMER_SET_RELOAD_VALUE(markStep); + } } } @@ -583,37 +584,35 @@ void ModemTxTestStart(enum ModemTxTestMode type) if(txTestState != TEST_DISABLED) //TX test is already running ModemTxTestStop(); //stop this test - setPtt(1); //PTT on + setPtt(true); //PTT on txTestState = type; - TIM2->CR1 &= ~TIM_CR1_CEN; //disable RX timer - TIM1->CR1 |= TIM_CR1_CEN; //enable DAC timer + MODEM_LL_ADC_TIMER_DISABLE(); + MODEM_LL_DAC_TIMER_ENABLE(); - NVIC_DisableIRQ(DMA1_Channel2_IRQn); //disable RX DMA interrupt - NVIC_EnableIRQ(TIM1_UP_IRQn); //enable DAC interrupt + NVIC_DisableIRQ(MODEM_LL_DMA_IRQ); + NVIC_EnableIRQ(MODEM_LL_DAC_IRQ); if(ModemConfig.modem == MODEM_9600) { - TIM1->ARR = markStep; - //enable baudrate generator - TIM3->CR1 = TIM_CR1_CEN; //enable timer - NVIC_EnableIRQ(TIM3_IRQn); //enable interrupt in NVIC + MODEM_LL_DAC_TIMER_SET_RELOAD_VALUE(markStep); + MODEM_LL_BAUDRATE_TIMER_ENABLE(); + NVIC_EnableIRQ(MODEM_LL_BAUDRATE_TIMER_IRQ); return; } if(type == TEST_MARK) { - TIM1->ARR = markStep; + MODEM_LL_DAC_TIMER_SET_RELOAD_VALUE(markStep); } else if(type == TEST_SPACE) { - TIM1->ARR = spaceStep; + MODEM_LL_DAC_TIMER_SET_RELOAD_VALUE(spaceStep); } else //alternating tones { - //enable baudrate generator - TIM3->CR1 = TIM_CR1_CEN; //enable timer - NVIC_EnableIRQ(TIM3_IRQn); //enable interrupt in NVIC + MODEM_LL_BAUDRATE_TIMER_ENABLE(); + NVIC_EnableIRQ(MODEM_LL_BAUDRATE_TIMER_IRQ); //enable interrupt in NVIC } } @@ -622,31 +621,33 @@ void ModemTxTestStop(void) { txTestState = TEST_DISABLED; - TIM3->CR1 &= ~TIM_CR1_CEN; //disable baudrate timer - TIM1->CR1 &= ~TIM_CR1_CEN; //disable DAC timer - TIM2->CR1 |= TIM_CR1_CEN; //enable RX timer + MODEM_LL_BAUDRATE_TIMER_DISABLE(); + MODEM_LL_DAC_TIMER_DISABLE(); //disable DAC timer + MODEM_LL_ADC_TIMER_ENABLE(); //enable RX timer - NVIC_DisableIRQ(TIM3_IRQn); - NVIC_DisableIRQ(TIM1_UP_IRQn); - NVIC_EnableIRQ(DMA1_Channel2_IRQn); + NVIC_DisableIRQ(MODEM_LL_BAUDRATE_TIMER_IRQ); + NVIC_DisableIRQ(MODEM_LL_DAC_IRQ); + NVIC_EnableIRQ(MODEM_LL_DMA_IRQ); - setPtt(0); //PTT off + setPtt(false); //PTT off } void ModemTransmitStart(void) { - setPtt(1); //PTT on + setPtt(true); //PTT on if(ModemConfig.modem == MODEM_9600) - TIM1->ARR = markStep; + { + MODEM_LL_DAC_TIMER_SET_RELOAD_VALUE(markStep); + } - TIM3->CR1 = TIM_CR1_CEN; - TIM1->CR1 = TIM_CR1_CEN; - TIM2->CR1 &= ~TIM_CR1_CEN; + MODEM_LL_BAUDRATE_TIMER_ENABLE(); + MODEM_LL_DAC_TIMER_ENABLE(); + MODEM_LL_ADC_TIMER_DISABLE(); - NVIC_DisableIRQ(DMA1_Channel2_IRQn); - NVIC_EnableIRQ(TIM1_UP_IRQn); - NVIC_EnableIRQ(TIM3_IRQn); + NVIC_DisableIRQ(MODEM_LL_DMA_IRQ); + NVIC_EnableIRQ(MODEM_LL_DAC_IRQ); + NVIC_EnableIRQ(MODEM_LL_BAUDRATE_TIMER_IRQ); } @@ -655,29 +656,31 @@ void ModemTransmitStart(void) */ void ModemTransmitStop(void) { - TIM2->CR1 |= TIM_CR1_CEN; - TIM3->CR1 &= ~TIM_CR1_CEN; - TIM1->CR1 &= ~TIM_CR1_CEN; - - NVIC_DisableIRQ(TIM1_UP_IRQn); - NVIC_DisableIRQ(TIM3_IRQn); - NVIC_EnableIRQ(DMA1_Channel2_IRQn); + MODEM_LL_ADC_TIMER_ENABLE(); + MODEM_LL_DAC_TIMER_DISABLE(); + MODEM_LL_BAUDRATE_TIMER_DISABLE(); - setPtt(0); + NVIC_DisableIRQ(MODEM_LL_DAC_IRQ); + NVIC_DisableIRQ(MODEM_LL_BAUDRATE_TIMER_IRQ); + NVIC_EnableIRQ(MODEM_LL_DMA_IRQ); - TIM4->CCR1 = 44; //set around 50% duty cycle + setPtt(false); } /** * @brief Controls PTT output - * @param state 0 - PTT off, 1 - PTT on + * @param state False - PTT off, true - PTT on */ -static void setPtt(uint8_t state) +static void setPtt(bool state) { if(state) - GPIOB->BSRR = GPIO_BSRR_BS7; + { + MODEM_LL_PTT_ON(); + } else - GPIOB->BSRR = GPIO_BSRR_BR7; + { + MODEM_LL_PTT_OFF(); + } } @@ -688,92 +691,24 @@ void ModemInit(void) { memset(demodState, 0, sizeof(demodState)); - /** - * TIM1 is used for pushing samples to DAC (R2R or PWM) (clocked at 18 MHz) - * TIM3 is the baudrate generator for TX (clocked at 18 MHz) - * TIM4 is the PWM generator with no software interrupt - * TIM2 is the RX sampling timer with no software interrupt, but it directly calls DMA - */ - - RCC->APB2ENR |= RCC_APB2ENR_IOPBEN; - RCC->APB2ENR |= RCC_APB2ENR_IOPCEN; - RCC->APB2ENR |= RCC_APB2ENR_IOPAEN; - RCC->APB1ENR |= RCC_APB1ENR_TIM2EN; - RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; - RCC->APB2ENR |= RCC_APB2ENR_TIM1EN; - RCC->APB2ENR |= RCC_APB2ENR_ADC1EN; - RCC->AHBENR |= RCC_AHBENR_DMA1EN; - + MODEM_LL_INITIALIZE_RCC(); //initialize peripheral clocks - GPIOC->CRH |= GPIO_CRH_MODE13_1; //DCD LED on PC13 - GPIOC->CRH &= ~GPIO_CRH_MODE13_0; - GPIOC->CRH &= ~GPIO_CRH_CNF13; + MODEM_LL_INITIALIZE_OUTPUTS(); - GPIOB->CRH &= ~0xFFFF0000; //R2R output on PB12-PB15 - GPIOB->CRH |= 0x22220000; + MODEM_LL_INITIALIZE_ADC(); - GPIOA->CRL &= ~GPIO_CRL_CNF0; //ADC input on PA0 - GPIOA->CRL &= ~GPIO_CRL_MODE0; + MODEM_LL_INITIALIZE_DMA(samples); + NVIC_EnableIRQ(MODEM_LL_DMA_IRQ); - GPIOB->CRL |= GPIO_CRL_MODE7_1; //PTT output on PB7 - GPIOB->CRL &= ~GPIO_CRL_MODE7_0; - GPIOB->CRL &= ~GPIO_CRL_CNF7; + MODEM_LL_ADC_TIMER_INITIALIZE(); - GPIOB->CRL |= GPIO_CRL_MODE5_1; //2nd DCD LED on PB5 - GPIOB->CRL &= ~GPIO_CRL_MODE5_0; - GPIOB->CRL &= ~GPIO_CRL_CNF5; + MODEM_LL_DAC_TIMER_INITIALIZE(); + MODEM_LL_BAUDRATE_TIMER_INITIALIZE(); - RCC->CFGR |= RCC_CFGR_ADCPRE_1; //ADC prescaler /6 - RCC->CFGR &= ~RCC_CFGR_ADCPRE_0; - - ADC1->CR2 |= ADC_CR2_CONT; //continuous conversion - ADC1->CR2 |= ADC_CR2_EXTSEL; - ADC1->SQR1 &= ~ADC_SQR1_L; //1 conversion - ADC1->SMPR2 |= ADC_SMPR2_SMP0_2; //41.5 cycle sampling - ADC1->SQR3 &= ~ADC_SQR3_SQ1; //channel 0 is first in the sequence - ADC1->CR2 |= ADC_CR2_ADON; //ADC on - - ADC1->CR2 |= ADC_CR2_RSTCAL; //calibrate ADC - while(ADC1->CR2 & ADC_CR2_RSTCAL) - ; - ADC1->CR2 |= ADC_CR2_CAL; - while(ADC1->CR2 & ADC_CR2_CAL) - ; - - ADC1->CR2 |= ADC_CR2_EXTTRIG; - ADC1->CR2 |= ADC_CR2_SWSTART; //start ADC conversion - - //prepare DMA - DMA1_Channel2->CCR |= DMA_CCR_MSIZE_0; //16 bit memory region - DMA1_Channel2->CCR &= ~DMA_CCR_MSIZE_1; - DMA1_Channel2->CCR |= DMA_CCR_PSIZE_0; - DMA1_Channel2->CCR &= ~DMA_CCR_PSIZE_1; - - DMA1_Channel2->CCR |= DMA_CCR_MINC | DMA_CCR_CIRC| DMA_CCR_TCIE; //circular mode, memory increment and interrupt - DMA1_Channel2->CNDTR = 4; //4 samples - DMA1_Channel2->CPAR = (uint32_t)&(ADC1->DR); //ADC data register address - DMA1_Channel2->CMAR = (uint32_t)samples; //sample buffer address - DMA1_Channel2->CCR |= DMA_CCR_EN; //enable DMA - - NVIC_EnableIRQ(DMA1_Channel2_IRQn); - - - //RX sampling timer - TIM2->PSC = 8; //72/9=8 MHz - TIM2->DIER |= TIM_DIER_UDE; //enable calling DMA on timer tick - - //TX DAC timer - TIM1->PSC = 3; //72/4=18 MHz - TIM1->DIER |= TIM_DIER_UIE; - - //baudrate timer - TIM3->PSC = 3; //72/4=18 MHz - TIM3->DIER |= TIM_DIER_UIE; - - if(ModemConfig.modem > MODEM_9600) - ModemConfig.modem = MODEM_1200; + if(ModemConfig.modem > MODEM_9600) + ModemConfig.modem = MODEM_1200; if((ModemConfig.modem == MODEM_1200) || (ModemConfig.modem == MODEM_1200_V23)) { @@ -852,8 +787,6 @@ void ModemInit(void) spaceFreq = 2100.f; } - - TIM2->ARR = 207; //8MHz / 208 =~38400 Hz (4*9600 Hz for 4x oversampling) } else if(ModemConfig.modem == MODEM_300) { @@ -878,8 +811,6 @@ void ModemInit(void) demodState[0].lpf.coeffs = (int16_t*)lpf300; demodState[0].lpf.taps = sizeof(lpf300) / sizeof(*lpf300); demodState[0].lpf.gainShift = 15; - - TIM2->ARR = 207; //8MHz / 208 =~38400 Hz (4*9600 Hz for 4x oversampling) } else if(ModemConfig.modem == MODEM_9600) { @@ -902,17 +833,18 @@ void ModemInit(void) demodState[0].lpf.taps = sizeof(lpf9600) / sizeof(*lpf9600); demodState[0].lpf.gainShift = 16; - TIM2->ARR = 51; //8MHz / 52 =~153600 Hz (4*38400 Hz for 4x oversampling) } - TIM2->CR1 |= TIM_CR1_CEN; //enable DMA timer + MODEM_LL_ADC_SET_SAMPLE_RATE(baudRate * N * MODEM_LL_OVERSAMPLING_FACTOR); + + MODEM_LL_ADC_TIMER_ENABLE(); - markStep = 18000000 / (DAC_SINE_SIZE * markFreq) - 1; - spaceStep = 18000000 / (DAC_SINE_SIZE * spaceFreq) - 1; - baudRateStep = 18000000 / baudRate - 1; + markStep = MODEM_LL_DAC_TIMER_CALCULATE_STEP(DAC_SINE_SIZE * markFreq); + spaceStep = MODEM_LL_DAC_TIMER_CALCULATE_STEP(DAC_SINE_SIZE * spaceFreq); + baudRateStep = MODEM_LL_BAUDRATE_TIMER_CALCULATE_STEP(baudRate); - TIM3->ARR = baudRateStep; + MODEM_LL_BAUDRATE_TIMER_SET_RELOAD_VALUE(baudRateStep); for(uint8_t i = 0; i < N; i++) //calculate correlator coefficients { @@ -933,21 +865,7 @@ void ModemInit(void) if(ModemConfig.usePWM) { - RCC->APB1ENR |= RCC_APB1ENR_TIM4EN; //configure timer - - GPIOB->CRL |= GPIO_CRL_CNF6_1; //configure pin for PWM - GPIOB->CRL |= GPIO_CRL_MODE6; - GPIOB->CRL &= ~GPIO_CRL_CNF6_0; - - //set up PWM generation - TIM4->PSC = 2; //72MHz/3=24MHz - TIM4->ARR = 257; //18MHz/258=93kHz - - TIM4->CCMR1 |= TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2; - TIM4->CCER |= TIM_CCER_CC1E; - TIM4->CCR1 = 127; //initial duty cycle - - TIM4->CR1 |= TIM_CR1_CEN; + MODEM_LL_PWM_INITIALIZE(); } } diff --git a/Src/stm32f1xx_it.c b/Src/stm32f1xx_it.c index 6d4e4da..2069d6c 100644 --- a/Src/stm32f1xx_it.c +++ b/Src/stm32f1xx_it.c @@ -23,7 +23,6 @@ #include "stm32f1xx_it.h" /* Private includes ----------------------------------------------------------*/ /* USER CODE BEGIN Includes */ -#include "Drivers/systick.h" /* USER CODE END Includes */ /* Private typedef -----------------------------------------------------------*/ @@ -187,7 +186,9 @@ void SysTick_Handler(void) /* USER CODE END SysTick_IRQn 0 */ HAL_IncTick(); /* USER CODE BEGIN SysTick_IRQn 1 */ -ticks++; + //defined in systick.c + extern volatile uint32_t ticks; + ticks++; /* USER CODE END SysTick_IRQn 1 */ } diff --git a/Src/drivers/systick.c b/Src/systick.c similarity index 97% rename from Src/drivers/systick.c rename to Src/systick.c index ec79a4c..3649ee7 100644 --- a/Src/drivers/systick.c +++ b/Src/systick.c @@ -16,8 +16,8 @@ You should have received a copy of the GNU General Public License along with VP-Digi. If not, see . */ -#include "drivers/systick.h" #include "stm32f1xx.h" +#include "systick.h" volatile uint32_t ticks = 0; //SysTick counter diff --git a/Src/terminal.c b/Src/terminal.c index 86742cc..eddfb88 100644 --- a/Src/terminal.c +++ b/Src/terminal.c @@ -16,14 +16,14 @@ You should have received a copy of the GNU General Public License along with VP-DigiConfig. If not, see . */ +#include "modem.h" +#include #include "terminal.h" #include "common.h" #include "beacon.h" #include "digipeater.h" #include "config.h" -#include "drivers/modem.h" #include "ax25.h" -#include "drivers/systick.h" #include "kiss.h" void TermHandleSpecial(Uart *u) diff --git a/Src/drivers/uart.c b/Src/uart.c similarity index 64% rename from Src/drivers/uart.c rename to Src/uart.c index 0817874..c573804 100644 --- a/Src/drivers/uart.c +++ b/Src/uart.c @@ -16,12 +16,12 @@ You should have received a copy of the GNU General Public License along with VP-Digi. If not, see . */ -#include "drivers/uart.h" -#include "drivers/systick.h" #include "terminal.h" #include "ax25.h" #include "common.h" #include +#include +#include #include "digipeater.h" #include "kiss.h" @@ -29,9 +29,9 @@ Uart Uart1 = {.defaultMode = MODE_KISS}, Uart2 = {.defaultMode = MODE_KISS}, Uar static void handleInterrupt(Uart *port) { - if(port->port->SR & USART_SR_RXNE) //byte received + if(UART_LL_CHECK_RX_NOT_EMPTY(port->port)) //byte received { - port->port->SR &= ~USART_SR_RXNE; + UART_LL_CLEAR_RX_NOT_EMPTY(port->port); uint8_t data = port->port->DR; port->rxBuffer[port->rxBufferHead++] = data; //store it port->rxBufferHead %= UART_BUFFER_SIZE; @@ -40,9 +40,9 @@ static void handleInterrupt(Uart *port) TermHandleSpecial(port); } - if(port->port->SR & USART_SR_IDLE) //line is idle, end of data reception + if(UART_LL_CHECK_RX_IDLE(port->port)) //line is idle, end of data reception { - port->port->DR; //reset idle flag by dummy read + UART_LL_GET_DATA(port->port); //reset idle flag by dummy read if(port->rxBufferHead != 0) { if(((port->rxBuffer[port->rxBufferHead - 1] == '\r') || (port->rxBuffer[port->rxBufferHead - 1] == '\n'))) //data ends with \r or \n, process as data @@ -51,29 +51,29 @@ static void handleInterrupt(Uart *port) } } } - if(port->port->SR & USART_SR_TXE) //TX buffer empty + if(UART_LL_CHECK_TX_EMPTY(port->port)) //TX buffer empty { if((port->txBufferHead != port->txBufferTail) || port->txBufferFull) //if there is anything to transmit { - port->port->DR = port->txBuffer[port->txBufferTail++]; + UART_LL_PUT_DATA(port->port, port->txBuffer[port->txBufferTail++]); port->txBufferTail %= UART_BUFFER_SIZE; port->txBufferFull = 0; } else //nothing more to be transmitted { - port->port->CR1 &= ~USART_CR1_TXEIE; + UART_LL_DISABLE_TX_EMPTY_INTERRUPT(port->port); } } } -void USART1_IRQHandler(void) __attribute__ ((interrupt)); -void USART1_IRQHandler(void) +void UART_LL_UART1_INTERUPT_HANDLER(void) __attribute__ ((interrupt)); +void UART_LL_UART1_INTERUPT_HANDLER(void) { handleInterrupt(&Uart1); } -void USART2_IRQHandler(void) __attribute__ ((interrupt)); -void USART2_IRQHandler(void) +void UART_LL_UART2_INTERUPT_HANDLER(void) __attribute__ ((interrupt)); +void UART_LL_UART2_INTERUPT_HANDLER(void) { handleInterrupt(&Uart2); } @@ -96,8 +96,8 @@ void UartSendByte(Uart *port, uint8_t data) port->txBufferHead %= UART_BUFFER_SIZE; if(port->txBufferHead == port->txBufferTail) port->txBufferFull = 1; - if(0 == (port->port->CR1 & USART_CR1_TXEIE)) - port->port->CR1 |= USART_CR1_TXEIE; + if(0 == (UART_LL_CHECK_ENABLED_TX_EMPTY_INTERRUPT(port->port))) + UART_LL_ENABLE_TX_EMPTY_INTERRUPT(port->port); } } @@ -161,53 +161,46 @@ void UartInit(Uart *port, USART_TypeDef *uart, uint32_t baud) void UartConfig(Uart *port, uint8_t state) { - if(port->port == USART1) + if(port->port == UART_LL_UART1_STRUCTURE) { - RCC->APB2ENR |= RCC_APB2ENR_IOPAEN; - RCC->APB2ENR |= RCC_APB2ENR_USART1EN; - GPIOA->CRH |= GPIO_CRH_MODE9_1; - GPIOA->CRH &= ~GPIO_CRH_CNF9_0; - GPIOA->CRH |= GPIO_CRH_CNF9_1; - GPIOA->CRH |= GPIO_CRH_CNF10_0; - GPIOA->CRH &= ~GPIO_CRH_CNF10_1; - - USART1->BRR = (SystemCoreClock / (port->baudrate)); + UART_LL_UART1_INITIALIZE_PERIPHERAL(port->baudrate); if(state) - USART1->CR1 |= USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE | USART_CR1_UE | USART_CR1_IDLEIE; + { + UART_LL_ENABLE(port->port); + } else - USART1->CR1 &= (~USART_CR1_RXNEIE) & (~USART_CR1_TE) & (~USART_CR1_RE) & (~USART_CR1_UE) & (~USART_CR1_IDLEIE); + { + UART_LL_DISABLE(port->port); + } - NVIC_SetPriority(USART1_IRQn, 2); + NVIC_SetPriority(UART_LL_UART1_IRQ, 2); if(state) - NVIC_EnableIRQ(USART1_IRQn); + NVIC_EnableIRQ(UART_LL_UART1_IRQ); else - NVIC_DisableIRQ(USART1_IRQn); + NVIC_DisableIRQ(UART_LL_UART1_IRQ); port->enabled = state > 0; port->isUsb = 0; } - else if(port->port == USART2) + else if(port->port == UART_LL_UART2_STRUCTURE) { - RCC->APB2ENR |= RCC_APB2ENR_IOPAEN; - RCC->APB1ENR |= RCC_APB1ENR_USART2EN; - GPIOA->CRL |= GPIO_CRL_MODE2_1; - GPIOA->CRL &= ~GPIO_CRL_CNF2_0; - GPIOA->CRL |= GPIO_CRL_CNF2_1; - GPIOA->CRL |= GPIO_CRL_CNF3_0; - GPIOA->CRL &= ~GPIO_CRL_CNF3_1; - - USART2->BRR = (SystemCoreClock / (port->baudrate * 2)); + UART_LL_UART2_INITIALIZE_PERIPHERAL(port->baudrate); + if(state) - USART2->CR1 |= USART_CR1_RXNEIE | USART_CR1_TE | USART_CR1_RE | USART_CR1_UE | USART_CR1_IDLEIE; + { + UART_LL_ENABLE(port->port); + } else - USART2->CR1 &= (~USART_CR1_RXNEIE) & (~USART_CR1_TE) & (~USART_CR1_RE) & (~USART_CR1_UE) & (~USART_CR1_IDLEIE); + { + UART_LL_DISABLE(port->port); + } - NVIC_SetPriority(USART2_IRQn, 2); + NVIC_SetPriority(UART_LL_UART2_IRQ, 2); if(state) - NVIC_EnableIRQ(USART2_IRQn); + NVIC_EnableIRQ(UART_LL_UART2_IRQ); else - NVIC_DisableIRQ(USART2_IRQn); + NVIC_DisableIRQ(UART_LL_UART2_IRQ); port->enabled = state > 0; port->isUsb = 0; diff --git a/Src/usbd_cdc_if.c b/Src/usbd_cdc_if.c index 359b919..30752a7 100644 --- a/Src/usbd_cdc_if.c +++ b/Src/usbd_cdc_if.c @@ -23,8 +23,6 @@ #include "usbd_cdc_if.h" /* USER CODE BEGIN INCLUDE */ -#include "drivers/uart.h" -#include "drivers/systick.h" #include "terminal.h" #include "kiss.h" /* USER CODE END INCLUDE */